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[tsmc’s 2nm process will continue to increase in price: each wafer exceeds us$30,000, twice that of 4/5nm] financial associated press, october 5, it is reported that tsmc has made a major breakthrough in the 2nm process node and will introduce it for the first time gate-all-around fets (gaafet) transistor technology. the n2 process also incorporates nanoflex technology, providing chip designers with unprecedented flexibility in standard components. compared with the current n3e process, the n2 process is expected to achieve a 10% to 15% performance improvement at the same power, or a 25% to 30% reduction in power consumption at the same frequency. even more impressive is that the transistor density will increase by 15%, which marks another leap for tsmc in the field of semiconductor technology. according to reports, tsmc’s price for each 300mm 2nm wafer may exceed us$30,000, higher than the previously expected us$25,000. in comparison, the current price of 3nm wafers is about us$18,500 to us$20,000, while the price of 4/5nm wafers is between us$15,000 and us$16,000.