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IT Home reported on August 27 that Intel introduced more details about the Xeon 6 SoC (code-named Granite Rapids-D) at the Hot Chips 2024 (HC36) academic conference held at Stanford University in the United States from the 25th to the 27th of this month.

Intel has reconfirmed its statement at MWC 2024 that Xeon 6 SoCs for edge and telecom will be launched next year.

▲ The image is from Intel’s official presentation document, quoted from foreign media ServeTheHome, the same below.

The Xeon 6 SoC "Granite Rapids-D" combines the Xeon 6 compute chiplet based on Intel 3 process and the edge-optimized I/O chiplet based on Intel 4, achieving significant improvements in performance, energy efficiency and transistor density.

This SoC uses a compatible BGA package and includes two sub-series: 4-channel memory (IT Home Note: expected to correspond to a single computing chiplet) and 8-channel memory (expected to correspond to dual computing chiplets). It also supports MCR DIMM high-speed memory.

Granite Rapids-D provides up to 32 PCIe 5.0 lanes, up to 16 PCIe 4.0 lanes, up to 16 CXL 2.0 lanes, and can be configured as dual 100Gb Ethernet ports.

In addition, the Xeon 6 SoC also has built-in accelerators such as Media Accelerator, QAT, DLB, vRAN Boost, DSA, and supports edge-oriented enhancements, including extended operating temperature range and industrial-grade reliability.