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On August 6, at Intel's recent earnings conference call, Intel CEO Pat Gelsinger revealed that the world's second High NA (high numerical aperture) EUV lithography machine will soon enter Intel's wafer factory in Oregon, USA.

ASML also said in its second quarter earnings conference that it has started shipping its second High NA EUV lithography machine to a customer, but did not specify which customer it was. Now it seems that the customer is Intel.

According to the data, ASML's first-generation High NA EUV (EXE:5000) has a resolution of 8nm, which can achieve miniaturization of physical features 1.7 times smaller than existing EUV lithography machines, increasing the transistor density of a single exposure by 2.9 times, which can enable chipmakers to simplify their manufacturing processes. In addition, EXE:5000 can lithograph more than 185 wafers per hour, which is an increase compared to the NXE system already used in mass manufacturing. ASML has also developed a roadmap for the second-generation High NA EUV lithography machine to be launched by 2025 to increase production capacity to 220 wafers per hour, ensuring that the integration of High NA EUV lithography machines into chip factories is economically critical for chip manufacturers. According to previous reports, the price of High NA EUV is as high as 350 million euros per unit.

As we all know, Intel has worked with ASML for decades to advance lithography from 193nm immersion lithography to EUV, but Intel chose not to use the technology in its 10nm process (equivalent to TSMC's 6nm) for cost reasons. Instead, Intel chose to use a standard deep ultraviolet (DUV) lithography machine for quadruple patterning, which requires four DUV exposures of a single chip layer instead of a single exposure with EUV. As a result, Intel encountered many difficulties in yield, which delayed its 10nm process by five years. This also caused Intel to be continuously surpassed by manufacturers such as TSMC and Samsung that pioneered the use of EUV lithography machines.

Therefore, after Intel CEO Gelsinger proposed the "IDM 2.0" strategy, Intel quickly refocused on the improvement of cutting-edge process technology and proposed a four-year five-process node plan, hoping to surpass TSMC's 2nm process by 2025 with Intel 18A. At the same time, Intel also hopes to achieve continued leadership over competitors such as TSMC by taking the lead in adopting High NA EUV lithography machines. Ultimately, Intel's foundry business will achieve a break-even operating profit margin by 2030 and become the world's second largest wafer foundry.

To this end, Intel took the lead in obtaining the world's first High NA EUV lithography machine in December 2023 and began installing it at Intel's Oregon wafer fab. A High NA EUV lithography system is the size of a double-decker bus and weighs up to 150 tons, equivalent to two Airbus A320 aircraft. The full system requires 250 containers in 43 freight containers for shipment. The installation time is estimated to take 250 engineers and 6 months to complete. It is not only expensive but also very time-consuming.

On April 18 this year, Intel officially announced that it had achieved an important milestone in advanced semiconductor manufacturing at its R&D base in Hillsboro, Oregon, completing the assembly of the industry's first commercial High NA EUV lithography machine.

According to Intel's plan, the High NA EUV lithography machine will first be used for relevant tests of Intel 18A to accumulate relevant experience, and will eventually be used for mass production of Intel 14A.

Previous reports showed that ASML has received orders for more than a dozen High NA EUV lithography machines, with customers including TSMC, Samsung, Intel, Micron and SK Hynix. ASML CEO Christophe Fouquet pointed out that DRAM chip manufacturers may start using High NA EUV equipment in 2025 or 2026.

Editor: Core Intelligence-Rurouni Sword