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IT Home reported on July 16 that MoneyDJ reported yesterday (July 15) that TSMC has formed a special team to explore a new packaging solution for fan-out panel-level packaging (FOPLP), and plans to build a small pilot production line (mini line) to advance the goal of replacing "circle" with "square".

TSMC started developing FOWLP (Fan-Out Wafer-Level Packaging) technology called InFO (Integrated Fan-Out Packaging) in 2016 for use in the A10 chip of the iPhone 7 series of mobile phones. After that, the packaging and testing factory actively promoted the FOWLP solution, hoping to attract customers with lower production costs.

However, at this stage, there has not been much breakthrough in the technology of FOWLP packaging solutions, and terminal applications are still stuck in mature process products such as PMIC (power management IC).

The latest news is that TSMC has formed a professional R&D team this time.It is planned to develop a rectangular semiconductor substrate with a length of 515 mm and a width of 510 mm to convert advanced packaging technology from wafer level to panel level.

IT Home quoted sources as reporting that the FOPLP developed by TSMC can be seen as a rectangular InFO, which has the advantages of low unit cost and large-size packaging. Technically, it can further integrate other technologies on TSMC's 3D fabric platform to develop advanced packaging such as 2.5D/3D to provide high-end product application services.

TSMC's FOPLP can be imagined as a rectangular CoWoS. Its current products are focused on the AI ​​GPU field, and its main customer is NVIDIA. If the project goes smoothly, it will be unveiled as early as 2026-2027.