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kuai technology reported on october 1 that it was revealed that intel is preparing a new p core architecture, codenamed "Panther Cove", will greatly improve performance and introduce a new instruction set.

it is reported that,intel's current architectural design is somewhat of a return to the tick-tock strategy of the past, with major changes and minor changes taking place alternately.

the p-core architecture used in the current core ultra 200 series is called lion cove, and this is true for both lunar lake and arrow lake. it is a very significant change.

its next generation is cougar cove, a relatively slightly upgraded version that is expected to be used in the low-power panther lake and high-performance nova lake, which is the core ultra 300 series.

then it’s panther cove’s turn, and if nothing unexpected happens, it should appear in the razer lake processor, that is, the core ultra 400 series.

panhter cove has another major architecture change, and ipc performance will be greatly improved., coupled with the more advanced technology by then, the performance and energy efficiency should be very good.

it will also introduce a new instruction set apx, which means "advanced performance extensions" and is also an extension of the x86 instruction architecture.

apx meetingadded more registers and tons of new features, for example, doubling the number of general-purpose registers to 32 allows the compiler to save more data and instructions, such as new reentry, storage, comparison, and test instruction formats, which can reduce the number of branch predictors and improve the efficiency of out-of-order execution. .

apx will greatly improve the general performance of the cpu without significantly increasing power consumption and chip area.

as for when the pure 64-bit architecture x86s under development will be launched, it is definitely still early.