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IT Home reported on July 16 that the Korea Economic Daily (hankyung) reported yesterday that Samsung Electronics has decided to use its own 4nm process to build logic chips in the next-generation HBM memory - HBM4.

IT Home Note: The logic chip here refers to Logic Die, SK Hynix calls it Base Die, and Micron calls it Interface Die. The structure is shown in the figure below of Micron:

The stacked DRAM Die memory chips provide the capacity for HBM memory; The Logic Die is the control unit of the DRAM stack and is also responsible for communicating with the memory interface on the processor through the interconnect layer., which is also an important component of HBM memory.

Traditionally, storage manufacturers usually use storage semiconductor technology to produce HBM memory logic dies, which is a simpler process. However, after the HBM4 generation, the logic die needs to support more signal pins, larger data bandwidth, and even carry some customer customized functions.

Therefore, storage manufacturers choose to cooperate with logic wafer fabs instead.Using logic semiconductor process to produce HBM4。

Earlier, there was news that TSMC will use 7nm process to manufacture HBM4 basic wafers for SK Hynix.

▲Samsung Electronics' most advanced HBM3E 12H memory

Samsung Electronics' storage division uses its own 4nm process to build logic chips. On the one hand, it can improve the overall energy efficiency of HBM4 memory and enhance product competitiveness; on the other hand, the more sophisticated 4nm process also leaves more room for the introduction of various customized functions.

Moreover, this move can also provide a sizeable order for its sister unit, the LSI division.

For Samsung Electronics' memory division,It is not unprecedented to introduce advanced technology from LSI divisions into products.: Its consumer-grade solid-state drive PM9C1a for OEMs is also equipped with a 5nm master control manufactured by the LSI department.